Semiconductor memory device and bit line sensing m

专利名称：Semiconductor memory device and bit line

sensing method thereof

发明人：Kyu-Nam Lim,Jei-Hwan Yoo,Young-Gu

Kang,Jae-Yoon Shim

申请号：US10290284申请日：20021108公开号：US068291B2公开日：20041207

专利附图：

摘要：In a semiconductor memory device, a circuit for controlling a voltage levelapplied to a bit line isolation circuit preferably includes a memory cell connected

between a cell bit line pair and a word line; a bit line pre-charge circuit; a sense amplifierbit line pre-charge circuit; a charge transfer circuit connected between the cell bit linepair and the sense amplifier bit line pair; a first sense amplifier circuit for amplifying avoltage of the sense amplifier bit line pair to a first voltage in response to a first controlsignal; and a second sense amplifier circuit for amplifying the voltage of the senseamplifier bit line pair to a second voltage in response to a second control signal. Thecombination of the two-stage sense amplifier ciruitry allows for the accurate

determination of minimally-different logical voltage levels and minimized circuit area.

申请人：SAMSUNG ELECTRONICS CO., LTD.

代理机构：Lee & Sterba, P.C.

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