专利名称：SIGNAL PROCESSING CIRCUIT, RESOLVER
DIGITAL CONVERTER, AND MULTIPATHNESTED MIRROR AMPLIFIER
发明人：Yoshihiro FUNATO,Toshio
KUMAMOTO,Tomoaki YOSHIZAWA,KazuakiKUROOKA
申请号：US14254294申请日：20140416
公开号：US20140340145A1公开日：20141120
专利附图：
摘要：A signal processing circuit includes a chopper amplifier that has a differentialamplifier circuit that amplifies differential input signals Vsp(t) and Vsm(t), and an addercircuit that generates an addition signal Vfil(t) by addition of the chopper output signalVsub(t) that the chopper amplifier generates. Differential signals inputted into thedifferential amplifier circuit are interchanged for every first phase period and secondphase period, and the adder circuit generates the addition signal by addition of thechopper output signal in the first phase period and in the second phase period.
申请人：RENESAS ELECTRONICS CORPORATION
地址：Kawasaki-shi JP
国籍：JP
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