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LTC3417资料

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LTC3417Dual Synchronous1.4A/800mA 4MHzStep-Down DC/DC RegulatorFEATURES■■■■■■■■■■■■■■■DESCRIPTIOUAPPLICATIO S■■■■■High Efficiency: Up to 95%1.4A/800mA Guaranteed Minimum Output CurrentNo Schottky Diodes RequiredProgrammable Frequency Operation: 1.5MHz orAdjustable From 0.6MHz to 4MHzLow RDS(ON) Internal SwitchesShort-Circuit ProtectedVIN: 2.25V to 5.5VCurrent Mode Operation for Excellent Line and LoadTransient Response125µA Quiescent Current in Sleep ModeUltralow Shutdown Current: IQ < 1µALow Dropout Operation: 100% Duty CyclePower Good OutputPhase Pin Selects 2nd Channel Phase Relationshipwith Respect to 1st ChannelInternal Soft-Start with Individual Run Pin ControlAvailable in Small Thermally Enhanced(5mm × 3mm) DFN and 20-Lead TSSOP PackagesThe LTC®3417 is a dual constant frequency, synchronousstep-down DC/DC converter. Intended for medium powerapplications, it operates from a 2.25V to 5.5V input voltagerange and has a constant programmable switching fre-quency, allowing the use of tiny, low cost capacitors andinductors 2mm or less in height. Each output voltage isadjustable from 0.8V to 5V. Internal synchronous lowRDS(ON) power switches provide high efficiency withoutthe need for external Schottky diodes.A user selectable mode input allows the user to trade offripple voltage for light load efficiency. Burst Mode® opera-tion provides high efficiency at light loads, while PulseSkip mode provides low ripple noise at light loads. A phasemode pin allows the second channel to operate in-phaseor 180° out-of-phase with respect to channel 1. Out-of-phase operation produces lower RMS current on VIN andthus lower RMS derating on the input capacitor.To further maximize battery life, the P-channel MOSFETsare turned on continuously in dropout (100% duty cycle)and both channels draw a total quiescent current of only125µA. In shutdown, the device draws <1µA. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation.Burst Mode is a registered trademark of Linear Technology Corporation.All other trademarks are the property of their respective owners.Protected by U.S. Patents, including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 6144194PDAs/Palmtop PCsDigital CamerasCellular PhonesPC CardsWireless and DSL ModemsTYPICAL APPLICATIOVIN2.5V TO 5.5V10µF1.5µH22pFVINFREQSW1RUN1VINVOUT11.8V1.4AOUT2 Efficiency(Burst Mode Operation)10095REFER TO FIGURE 4102.2µHSW2RUN2LTC3417VIN22pFEFFICIENCY (%)VOUT22.5V800mA9085EFFICIENCY0.1511kVFB122µF412kITH15.9k2200pFVFB2ITH2GND2.87k6800pF3417 TA01866k412k10µF8075700.001U1POWER LOSS (W)U0.01POWER LOSSVIN = 3.6VVOUT = 2.5VFREQ = 1MHz0.010.1LOAD CURRENT (A)13417 TA01a0.0010.00013417fb

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LTC3417

ABSOLUTE AXI U RATI GS(Note 1)VIN1, VIN2 Voltages..................................... –0.3V to 6VMODE, SW1, SW2, RUN1,RUN2, VFB1, VFB2, PHASE, FREQ,ITH1, ITH2 Voltages............. –0.3V to (VIN1/VIN2 + 0.3V)VIN1 – VIN2, VIN2 – VIN1......................................... 0.3VPGOOD Voltage.......................................... –0.3V to 6VOperating Ambient Temperature Range(Note 2)..................................................–40°C to 85°CJunction Temperature (Notes 7, 8)...................... 125°CStorage Temperature RangeDFN Package................................... –65°C to 125°CTSSOP Package............................... –65°C to 150°CUUWPACKAGE/ORDER I FOR ATIOTOP VIEWRUN1VIN1ITH1VFB1VFB2ITH2RUN2VIN2123456781716PGND115SW114PHASE13GNDA12FREQ11PGOOD10SW29MODEORDER PARTNUMBERLTC3417EDHCDHC PART MARKING3417DHC PACKAGE16-LEAD (3mm × 5mm) PLASTIC DFNTJMAX = 125°C, θJA = 43°C/WEXPOSED PAD (PIN 17) IS PGND2/GNDDMUST BE SOLDERED TO PCBOrder Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBFLead Free Part Marking: http://www.linear.com/leadfree/Consult LTC Marketing for parts specified with wider operating temperature ranges.ELECTRICAL CHARACTERISTICSThe ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.VIN = 3.6V unless otherwise specified. (Note 2)SYMBOLVIN1, VIN2IFB1, IFB2VFB1, VFB2∆VLINEREGVLOADREGgm(EA)PARAMETEROperating Voltage RangeFeedback Pin Input CurrentFeedback VoltageReference Voltage Line Regulation. %/V is thePercentage Change in VOUT with a Change in VINOutput Voltage Load RegulationError Amplifier TransconductanceCONDITIONSVIN1 = VIN2(Note 3)(Note 3)VIN = 2.25V to 5V (Note 3)ITH1, ITH2 = 0.36V (Note 3)ITH1, ITH2 = 0.84V (Note 3)ITH1, ITH2(PINLOAD) = ±5µA (Note 3)●●2

UWWWTOP VIEWGNDDRUN1VIN1ITH1VFB1VFB2ITH2RUN2VIN21234567892120GNDD19PGND118SW117PHASE16GNDA15FREQ14PGOOD13SW212MODE11PGND2ORDER PARTNUMBERLTC3417EFEPGND210FE PACKAGE20-LEAD PLASTIC TSSOPTJMAX = 125°C, θJA = 38°C/WEXPOSED PAD (PIN 21) IS PGND2/GNDDMUST BE SOLDERED TO PCBMIN2.250.784TYPMAX5.5±0.1UNITSVµAV%/V%%µS0.80.040.02–0.0214000.8160.20.2–0.23417fb

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LTC3417

ELECTRICAL CHARACTERISTICSThe ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.VIN = 3.6V unless otherwise specified. (Note 2)SYMBOLISPARAMETERInput DC Supply Current (Note 4) Active Mode Half Active Mode (VRUN2 = 0V, 1.4A Only) Both Channels in Sleep Mode ShutdownfOSCOscillator FrequencyCONDITIONSVFB1 = VFB2 = 0.75V, VMODE = VIN,VRUN1 = VRUN2 = VINVFB1 = 0.75V, VMODE = VIN, VRUN1 = VINVFB1 = VFB2 = 1V, VMODE = VIN,VRUN1 = VRUN2 = VINVRUN1 = VRUN2 = 0VVFREQ = VINVFREQ: RT = 143kVFREQ: Resistor (Note 6)1.20.851.81VIN1 = 3.6V (Note 5)VIN1 = 3.6V (Note 5)VIN2 = 3.6V (Note 5)VIN2 = 3.6V (Note 5)VIN1 = 6V, VITH1 = 0V, VRUN1 = 0VVIN2 = 6V, VITH2 = 0V, VRUN2 = 0VVIN1, VIN2 Ramping DownVIN1, VIN2 Ramping UpVFB1 or VFB2 Ramping Up, VMODE = 0VVFB1 or VFB2 Ramping Down, VMODE = 0V1.91.95MINTYP4002602601250.11.512.251.20.0880.0840.160.150.010.012.072.12–6–61600.3VIN –0.50.5VIN = 6V, PVIN = 3V0.0110.5VIN –0.5VIN –0.50.853001.5112.22.25MAX60040040025011.81.254UNITSµAµAµAµAµAMHzMHzMHzAAΩΩΩΩµAµAVV%%ΩVVVµAVVV Half Active Mode (VRUN1 = 0V, 800mA Only)VFB2 = 0.75V, VMODE = VIN, VRUN2 = VINILIM1ILIM2RDS(ON)1RDS(ON)2ISW1(LKG)ISW2(LKG)VUVLOTPGOODPeak Switch Current Limit on SW1 (1.4A)Peak Switch Current Limit on SW2 (800mA)SW1 Top Switch On-Resistance (1.4A)SW1 Bottom Switch On-ResistanceSW2 Top Switch On-Resistance (800mA)SW2 Bottom Switch On-ResistanceSwitch Leakage Current SW1 (1.4A)Switch Leakage Current SW2 (800mA)Undervoltage Lockout ThresholdThreshold for Power Good. PercentageDeviation from VFB Steady State(Typically 0.8V)Power Good Pull-Down On-ResistanceRUN1, RUN2 ThresholdPHASE Threshold High-CMOS LevelsPHASE Threshold Low-CMOS LevelsRPGOODVRUN1, VRUN2VPHASEIRUN1, IRUN2,RUN1, RUN2, PHASE and MODEIPHASE, IMODELeakage CurrentVTLMODEVTHMODEVTHFREQMODE Threshold Voltage LowMODE Threshold Voltage HighFREQ Threshold Voltage HighNote 1: Stresses beyond those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. Exposure to any AbsoluteMaximum Rating condition for extended periods may affect devicereliability and lifetime.Note 2: The LTC3417 is guaranteed to meet specified performance from0°C to 85°C. Specifications over the –40°C to 85°C operating ambienttemperature range are assured by design, characterization and correlationwith statistical process controls.Note 3: The LTC3417 is tested in feedback loop which servos VFB1 to themidpoint for the error amplifier (VITH1 = 0.6V) and VFB2 to the midpoint forthe error amplifier (VITH2 = 0.6V).Note 4: Total supply current is higher due to the internal gate charge beingdelivered at the switching frequency.Note 5: Switch on-resistance is guaranteed by design and test correlationon the DHC package and by final test correlation on the FE package.Note 6: Variable frequency operation with resistor is guaranteed by designbut not production tested and is subject to duty cycle limitations.Note 7: This IC includes overtemperature protection that is intended toprotect the device during momentary overload conditions. Junctiontemperature will exceed 125°C when overtemperature protection is active.Continuous operation above the specified maximum operating junctiontemperature may impair device reliability.Note 8: TJ is calculated from the ambient temperature, TA, and powerdissipation, PD, according to the following formula:LTC3417EDHC: TJ = TA + (PD • 43°C/W)LTC3417EFE: TJ = TA + (PD • 38°C/W)3417fb

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LTC3417

TYPICAL PERFOR A CE CHARACTERISTICS

OUT1 Burst Mode OperationOUT1 Pulse SkippingMode OperationOUT1 Forced ContinuousMode OperationVOUT20mV/DIVIL250mA/DIVVIN = 3.6V2µs/DIVVOUT = 1.8VILOAD = 100mAREFER TO FIGURE 4OUT2 Burst Mode OperationVOUT20mV/DIVIL250mA/DIVVIN = 3.6V2µs/DIVVOUT = 2.5VILOAD = 60mAREFER TO FIGURE 4OUT1 Efficiency vs Load Current100VIN = 2.5VV95OUT = 1.8V90100EFFICIENCY (%)EFFICIENCY (%)8580757065600.0010.01Burst ModeOPERATIONPULSE SKIPFORCEDCONTINUOUS REFER TO FIGURE 40.11103417 G078580757065600.0010.01Burst ModeOPERATIONPULSE SKIPFORCEDCONTINUOUS REFER TO FIGURE 40.11LOAD CURRENT (A)3417 G08EFFICIENCY (%)LOAD CURRENT (A)4

UW

VOUT20mV/DIVVOUT20mV/DIVIL250mA/DIVIL250mA/DIV3417 G01VIN = 3.6V2µs/DIVVOUT = 1.8VILOAD = 100mAREFER TO FIGURE 43417 G02VIN = 3.6V2µs/DIVVOUT = 1.8VILOAD = 100mAREFER TO FIGURE 43417 G03OUT2 Pulse SkippingMode OperationOUT2 Forced ContinuousMode OperationVOUT20mV/DIVVOUT20mV/DIVIL250mA/DIVIL250mA/DIV3417 G04VIN = 3.6V2µs/DIVVOUT = 2.5VILOAD = 60mAREFER TO FIGURE 43417 G05VIN = 3.6V2µs/DIVVOUT = 2.5VILOAD = 60mAREFER TO FIGURE 43417 G06OUT2 Efficiency vs Load CurrentVIN = 3.6VV95OUT = 2.5V909010095OUT1 Efficiency vs VIN(Burst Mode Operation)VOUT = 1.8VILOAD = 460mAILOAD = 1.4A85807570REFER TO FIGURE 422.533.544.555.53417 G09VIN (V)3417fb

元器件交易网www.cecb2b.com

LTC3417

TYPICAL PERFOR A CE CHARACTERISTICSOUT2 Efficiency vs VIN(Pulse Skipping Mode)100ILOAD = 250mA95EFFICIENCY (%)9085807570ILOAD = 800mAVOUT = 2.5VREFER TO FIGURE 422.533.544.5VIN (V)3417 G10Efficiency vs Frequency OUT194929088868482TA = 27°CVIN = 3.6VVOUT = 1.8VIOUT = 300mAEFFICIENCY (%)EFFICIENCY (%)RDS(ON) (Ω)0123FREQUENCY (MHz)3417 G13RDS(ON) vs VIN OUT20.200.190.18P-CHANNEL SWITCHTA = 27°CFREQUENCY VARIATION (%)20–2FREQ = 143k TO GROUNDFREQUENCY VARIATION (%)RDS(ON) (Ω)0.170.160.15N-CHANNEL SWITCH0.1422.533.544.5VIN (V)3417 G16UW545Load Step OUT1Load Step OUT2VOUT1100mV/DIVVOUT2100mV/DIVIOUT1500mA/DIVIOUT2500mA/DIV5.5VIN = 3.6V100µs/DIVVOUT = 1.8VILOAD = 0.25A to 1.4AREFER TO FIGURE 43417 G11VIN = 3.6V100µs/DIVVOUT = 2.5VILOAD = 0.25A to 0.8AREFER TO FIGURE 43417 G12Efficiency vs Frequency OUT29085800.0950.105RDS(ON) vs VIN OUT1TA = 27°C0.100P-CHANNEL SWITCH757065TA = 27°CVIN = 3.6VVOUT = 2.5VIOUT = 100mA0.0900.085N-CHANNEL SWITCH560012340.08022.533.544.555.5FREQUENCY (MHz)3417 G14VIN (V)3417 G15Frequency vs VIN6151050Frequency vs Temperature4FREQ = VINFREQ = 143k TO GROUND–4–6–8FREQ = VIN–5–10–15–50–255.5–1022.533.544.555.50255075100125VIN (V)3417 G17TEMPERATURE (˚C)3417 G183417fb

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LTC3417

PI FUCTIOS(DFN/TSSOP)RUN1 (Pin 1/Pin 2): Enable for 1.4A Regulator. When atLogic 1, 1.4A regulator is running. When at 0V, 1.4Aregulator is off. When both RUN1 and RUN2 are at 0V, thepart is in shutdown.VIN1 (Pin 2/Pin 3): Supply Pin for P-Channel Switch of1.4A Regulator.ITH1 (Pin 3/Pin 4): Error Amplifier Compensation Point for1.4A Regulator. The current comparator threshold in-creases with this control voltage. Nominal voltage rangefor this pin is 0V to 1.5V.VFB1 (Pin 4/Pin 5): Receives the feedback voltage fromexternal resistive divider across the 1.4A regulator output.Nominal voltage for this pin is 0.8V.VFB2 (Pin 5/Pin 6): Receives the feedback voltage fromexternal resistive divider across the 800mA regulatoroutput. Nominal voltage for this pin is 0.8V.ITH2 (Pin 6/Pin 7): Error Amplifier Compensation Point for800mA regulator. The current comparator threshold in-creases with this control voltage. Nominal voltage rangefor this pin is 0V to 1.5V.RUN2 (Pin 7/Pin 8): Enable for 800mA Regulator. Whenat Logic 1, 800mA regulator is running. When at 0V,800mA regulator is off. When both RUN1 and RUN2 are at0V, the part is in shutdown.VIN2 (Pin 8/Pin 9): Supply Pin for P-Channel Switch of800mA Regulator and Supply for Analog Circuitry.MODE (Pin 9/Pin 12): Mode Selection Pin. This pincontrols the operation of the device. When the voltage onthe MODE pin is >(VIN – 0.5V), Burst Mode operation isselected. When the voltage on the MODE pin is <0.5V,pulse skipping mode is selected. When the MODE pin isheld at VIN/2, forced continuous mode is selected.SW2 (Pin 10/Pin 13): Switch Node Connection to theInductor for the 800mA Regulator. This pin swings fromVIN2 to PGND2.PGOOD (Pin 11/Pin 14): Power Good Pin. This commondrain-logic output is pulled to GND when the outputvoltage of either regulator is –6% of regulation. If eitherRUN1 or RUN2 is low (the respective regulator is in sleepmode and therefore the output voltage is low), thenPGOOD reflects the regulation of the running regulator.FREQ (Pin 12/Pin 15): Frequency Set Pin. When FREQ isat VIN, internal oscillator runs at 1.5MHz. When a resistoris connected from this pin to ground, the internal oscillatorfrequency can be varied from 0.6MHz to 4MHz.GNDA (Pin 13/Pin 16): Analog Ground Pin for InternalAnalog Circuitry.PHASE (Pin 14/Pin 17): Selects 800mA regulator switch-ing phase with respect to 1.4A regulator switching. Set toVIN, the 1.4A regulator and the 800mA regulator are inphase. When PHASE is at 0V, the 1.4A regulator and the800mA regulator are switching 180 degrees out-of-phase.SW1 (Pin 15/Pin 18): Switch Node Connection to theInductor for the 1.4A Regulator. This pin swings from VIN1to PGND1.PGND1 (Pin 16/Pin 19): Ground for SW1 N-ChannelDriver.PGND2, GNDD (Pins 1,10,11,20): TSSOP Package Only.Ground for SW2 N-channel driver and digital ground forcircuit.Exposed Pad (Pin 17/Pin 21): PGND2, GNDD. Ground forSW2 N-channel driver and digital ground for circuit. TheExposed Pad must be soldered to PCB ground.6

UUU3417fb

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LTC3417

WFUCTIOAL DIAGRA UU1.4A REGULATORITH1+VFB1ITHLIMITVIN1–+VBSLOPECOMPENSATIONANTI-SHOOT-THROUGHSW1–0.752V+–+LOGIC0.848V–+––+PGND1RUN1PGOODVOLTAGEREFERENCEVIN2–+RUN2PHASEMODEOSCILLATORFREQPGND20.848V–+–+ANTI-SHOOT-THROUGHSLOPECOMPENSATIONLOGIC0.752VVFB2–+VB800mA REGULATORITH2ITHLIMIT+––+––+SW2VIN23417 BD+3417fb

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LTC3417

UOPERATIOThe LTC3417 uses a constant frequency, current modearchitecture. Both channels share the same clock fre-quency. The PHASE pin sets whether the channels arerunning in-phase or out of phase. The operating frequencyis determined by connecting the FREQ pin to VIN for1.5MHz operation or by connecting a resistor from FREQto ground for a frequency from 0.6MHz to 4MHz. To suita variety of applications, the MODE pin allows the user totrade off noise for efficiency.The output voltages are set by external dividers returnedto the VFB1 and VFB2 pins. An error amplifier compares thedivided output voltage with a reference voltage of 0.8V andadjusts the peak inductor current accordingly. Undervolt-age comparators will pull the PGOOD output low wheneither output voltage is 6% below its targeted value.Main Control LoopFor each regulator, during normal operation, the P-chan-nel MOSFET power switch is turned on at the beginning ofa clock cycle when the VFB voltage is below the referencevoltage. The current into the inductor and the load in-creases until the current limit is reached. The switch turnsoff and energy stored in the inductor flows through thebottom N-channel MOSFET switch into the load until thenext clock cycle.The peak inductor current is controlled by the voltage onthe ITH pin, which is the output of the error amplifier. Thisamplifier compares the VFB pin to the 0.8V reference.When the load current increases the VFB voltage decreasesslightly below the reference. This decrease causes theerror amplifier to increase the ITH voltage until the averageinductor current matches the new load current.The main control loop is shut down by pulling the RUN pinto ground. A digital soft-start is enabled after shutdown,which will slowly ramp the peak inductor current up over1024 clock cycles.Low Current OperationThree modes are available to control the operation of theLTC3417 at low currents. Each of the three modes auto-matically switch from continuous operation to the se-lected mode when the load current is low.To optimize efficiency, Burst Mode operation can beselected. When the load is relatively light, the LTC3417automatically switches into Burst Mode operation in whichthe PMOS switches operate intermittently based on loaddemand. By running cycles periodically, the switchinglosses, which are dominated by the gate charge losses ofthe power MOSFETs, are minimized. The main controlloop is interrupted when the output voltage reaches thedesired regulated value. The hysteresis voltage compara-tor trips when ITH is below 0.24V, shutting off the switchand reducing the power. The output capacitor and theinductor supply the power to the load until ITH exceeds0.31V, turning on the switch and the main control loopwhich starts another cycle.For lower output voltage ripple at low currents, pulseskipping mode can be used. In this mode, the LTC3417continues to switch at constant frequency down to verylow currents, where it will begin skipping pulses used tocontrol the power MOSFETs.Finally, in forced continuous mode, the inductor current isconstantly cycled creating a fixed output voltage ripple atall output current levels. This feature is desirable in tele-communications since the noise is a constant frequencyand is thus easy to filter out. Another advantage of thismode is that the regulator is capable of both sourcingcurrent into a load and sinking some current from theoutput.The mode selection for the LTC3417 is set using the MODEpin. The MODE pin sets the mode for both the 800mA andthe 1.4A step-down DC/DC converters.3417fb

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LTC3417

UOPERATIODropout OperationWhen the input supply voltage decreases toward theoutput voltage, the duty cycle increases to 100%. In thisdropout condition, the PMOS switch is turned on continu-ously with the output voltage being equal to the inputvoltage minus the voltage drops across the internal P-channel MOSFET and inductor.Low Supply OperationThe LTC3417 incorporates an undervoltage lockout circuitwhich shuts down the part when the input voltage dropsbelow about 2.07V to prevent unstable operation.APPLICATIOS IFORATIORT (kΩ)A general LTC3417 application circuit is shown inFigure 4. External component selection is driven by theload requirement, and begins with the selection of theinductors L1 and L2. Once L1 and L2 are chosen, CIN,COUT1 and COUT2 can be selected.Operating FrequencySelection of the operating frequency is a tradeoff betweenefficiency and component size. High frequency operationallows the use of smaller inductor and capacitor values.Operation at lower frequencies improves efficiency byreducing internal gate charge losses but requires largerinductance values and/or capacitance to maintain lowoutput ripple voltage.The operating frequency, fO, of the LTC3417 is determinedby pulling the FREQ pin to VIN for 1.5MHz operation or byconnecting an external resistor from FREQ to ground. Thevalue of the resistor sets the ramp current that is used tocharge and discharge an internal timing capacitor withinthe oscillator and can be calculated by using the followingequation:1.61•1011RT=(Ω)–16.586kΩfOfor 0.6MHz ≤ fO ≤ 4MHz. Alternatively, use Figure 1 toselect the value for RT.The maximum operating frequency is also constrained bythe minimum on-time and duty cycle. This can be calcu-lated as:U1601401201008060402000

0.51.01.52.02.53.03.54.04.5

FREQUENCY (MHz)

3417 F01

WUUFigure 1. Frequency vs RT⎛V⎞fO(MAX)≈6.67⎜OUT⎟(MHz)⎝VIN(MAX)⎠The minimum frequency is limited by leakage and noisecoupling due to the large resistance of RT.Inductor SelectionAlthough the inductor does not influence the operatingfrequency, the inductor value has a direct effect on ripplecurrent. The inductor ripple current, ∆IL, decreases withhigher inductance and increases with higher VIN or VOUT.∆IL=VOUT⎛VOUT⎞⎜1–⎟fO•L⎝VIN⎠Accepting larger values of ∆IL allows the use of lowinductances, but results in higher output voltage ripple,greater core losses and lower output current capability.3417fb

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LTC3417

APPLICATIOS IFORATIOA reasonable starting point for setting ripple current is∆IL = 0.35ILOAD(MAX), where ILOAD(MAX) is the maximumcurrent output. The largest ripple, ∆IL, occurs at themaximum input voltage. To guarantee that the ripplecurrent stays below a specified maximum, the inductorvalue should be chosen according to the following equa-tion:VOUT⎛VOUT⎞L=1–⎟fO•∆IL⎜⎝VIN(MAX)⎠The inductor value will also have an effect on Burst Modeoperation. The transition from low current operation be-gins when the peak inductor current falls below a level setby the burst clamp. Lower inductor values result in higherripple current which causes this to occur at lower loadcurrents. This causes a dip in efficiency in the upper rangeof low current operation. In Burst Mode operation, lowerinductor values will cause the burst frequency to increase.Inductor Core SelectionDifferent core materials and shapes will change the size/current relationship of an inductor. Toroid or shielded potcores in ferrite or permalloy materials are small and don’tradiate much energy, but generally cost more than pow-dered iron core inductors with similar electrical character-istics. The choice of which style inductor to use oftendepends more on the price vs size requirements of anyTable 1MANUFACTURERL1 on OUT1TokoCoilcraftSumidaMidcomL2 on OUT2TokoCoilcraftSumidaMidcomA915AY-2R0M-D53LCDO1608C-222MLCDRH3D16/HP 2R2CDRH2D18/HP 2R2DUP-1813-2R2R2.02.22.22.22.2A920CY-1R5M-D62CBA918CY-1R5M-D62LCBDO1608C-152MLCDRH4D22/HP 1R5CDRH2D18/HP 1R7DUP-1813-1R4R1.51.51.51.51.71.4PART NUMBERVALUE (µH)10

Uradiated field/EMI requirements than on what the LTC3417requires to operate. Table 1 shows some typical surfacemount inductors that work well in LTC3417 applications.Input Capacitor (CIN) SelectionIn continuous mode, the input current of the converter canbe approximated by the sum of two square waves withduty cycles of approximately VOUT1/VIN and VOUT2/VIN. Toprevent large voltage transients, a low equivalent seriesresistance (ESR) input capacitor sized for the maximumRMS current must be used. Some capacitors have a de-rating spec for maximum RMS current. If the capacitorbeing used has this requirement, it is necessary to calcu-late the maximum RMS current. The RMS current calcu-lation is different if the part is used in “in phase” or “out ofphase”.For “in phase”, there are two different equations:VOUT1 > VOUT2:IRMS=2•I1•I2•D2(1–D1)+I22(D2–D22)+I12(D1–D12)WUUVOUT2 > VOUT1:IRMS=2•I1•I2•D11(–D2)+I22(D2–D22)+I12(D1–D12)where:D1=VOUT1VandD2=OUT2VINVINDCR0.0140.0180.060.0310.0350.0330.0270.070.0470.0350.047DIMENSIONS L × W × H (mm)6 × 6 × 2.56 × 6 × 26.6 × 4.5 × 2.95 × 5 × 2.43.2 × 3.2 × 24.3 × 4.8 × 3.55 × 5 × 36.6 × 4.5 × 2.94 × 4 × 1.83.2 × 3.2 × 24.3 × 4.8 × 3.53417fb

MAX DC CURRENT (A)2.82.92.63.91.85.53.92.31.751.63.9元器件交易网www.cecb2b.com

LTC3417

APPLICATIOS IFORATIOWhen D1 = D2 then the equation simplifies to:IRMS=(I1+I2)D(1–D)orIRMS=(I1+I2)VOUT(VIN–VOUT)VINwhere the maximum average output currents I1 and I2equal the respective peak currents minus half the peak-to-peak ripple currents:∆IL12∆I

I2=ILIM2–L2

2I1=ILIM1–

These formula have a maximum at VIN = 2VOUT, whereIRMS = (I1 + I2)/2. This simple worst case is commonlyused to determine the highest IRMS.For “out of phase” operation, the ripple current can belower than the “in phase” current.In the “out of phase” case, the maximum IRMS does notoccur when VOUT1 = VOUT2. The maximum typically occurswhen VOUT1 – VIN/2 = VOUT2 or when VOUT2 – VIN/2 =VOUT1. As a good rule of thumb, the amount of worst caseripple is about 75% of the worst case ripple in the “inphase” mode. Also note that when VOUT1 = VOUT2 = VIN/2and I1 = I2, the ripple is zero.Note that capacitor manufacturer’s ripple current ratingsare often based on only 2000 hours lifetime. This makes itadvisable to further derate the capacitor, or choose acapacitor rated at a higher temperature than required.Several capacitors may also be paralleled to meet the sizeor height requirements of the design. An additional 0.1µFto 1µF ceramic capacitor is also recommended on VIN forhigh frequency decoupling, when not using an all ceramiccapacitor solution.UOutput Capacitor (COUT1 and COUT2) SelectionThe selection of COUT1 and COUT2 is driven by the requiredESR to minimize voltage ripple and load step transients.Typically, once the ESR requirement is satisfied, thecapacitance is adequate for filtering. The output ripple(∆VOUT) is determined by:⎛⎞1∆VOUT≈∆IL⎜ESRCOUT+⎟⎝8•fO•COUT⎠WUUwhere fO = operating frequency, COUT = output capacitanceand ∆IL = ripple current in the inductor. The output rippleis highest at maximum input voltage, since ∆IL increaseswith input voltage. With ∆IL = 0.35ILOAD(MAX), the outputripple will be less than 100mV at maximum VIN and fO =1MHz with:ESRCOUT < 150mΩOnce the ESR requirements for COUT have been met, theRMS current rating generally far exceeds the IRIPPLE(P-P)requirement, except for an all ceramic solution.In surface mount applications, multiple capacitors mayhave to be paralleled to meet the capacitance, ESR or RMScurrent handling requirement of the application. Alumi-num electrolytic, special polymer, ceramic and dry tanta-lum capacitors are all available in surface mount pack-ages. The OS-CON semiconductor dielectric capacitoravailable from Sanyo has the lowest ESR(size) product ofany aluminum electrolytic at a somewhat higher price.Special polymer capacitors, such as Sanyo POSCAP, offervery low ESR, but have a lower capacitance density thanother types. Tantalum capacitors have the highest capaci-tance density, but it has a larger ESR and it is critical thatthe capacitors are surge tested for use in switching powersupplies. An excellent choice is the AVX TPS series ofsurface tantalums, available in case heights ranging from2mm to 4mm. Aluminum electrolytic capacitors have asignificantly larger ESR, and are often used in extremelycost-sensitive applications provided that consideration is3417fb

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LTC3417

APPLICATIOS IFORATIOgiven to ripple current ratings and long term reliability.Ceramic capacitors have the lowest ESR and cost but alsohave the lowest capacitance density, high voltage andtemperature coefficient and exhibit audible piezoelectriceffects. In addition, the high Q of ceramic capacitors alongwith trace inductance can lead to significant ringing. Othercapacitor types include the Panasonic specialty polymer(SP) capacitors.In most cases, 0.1µF to 1µF of ceramic capacitors shouldalso be placed close to the LTC3417 in parallel with themain capacitors for high frequency decoupling.Ceramic Input and Output CapacitorsHigher value, lower cost ceramic capacitors are nowbecoming available in smaller case sizes. These are tempt-ing for switching regulator use because of their very lowESR. Unfortunately, the ESR is so low that it can causeloop stability problems. Solid tantalum capacitor ESRgenerates a loop “zero” at 5kHz to 50kHz that is instrumen-tal in giving acceptable loop phase margin. Ceramic ca-pacitors remain capacitive to beyond 300kHz and usuallyresonate with their ESL before ESR becomes effective.Also, ceramic capacitors are prone to temperature effectswhich require the designer to check loop stability over theoperating temperature range. To minimize their largetemperature and voltage coefficients, only X5R or X7Rceramic capacitors should be used. A good selection ofceramic capacitors is available from Taiyo Yuden, TDK andMurata.Great care must be taken when using only ceramic inputand output capacitors. When a ceramic capacitor is usedat the input and the power is being supplied through longwires, such as from a wall adapter, a load step at the outputcan induce ringing at the VIN pin. At best, this ringing cancouple to the output and be mistaken as loop instability. Atworst, the ringing at the input can be large enough todamage the part.Since the ESR of a ceramic capacitor is so low, the inputand output capacitor must fulfill a charge storage require-ment. During a load step, the output capacitor must12

Uinstantaneously supply the current to support the loaduntil the feedback loop raises the switch current enough tosupport the load. The time required for the feedback loopto respond is dependent on the compensation compo-nents and the output capacitor size. Typically, 3 to 4 cyclesare required to respond to a load step, but only in the firstcycle does the output drop linearly. The output droop,VDROOP, is usually about 2 to 3 times the linear droop of thefirst cycle. Thus, a good place to start is with the outputcapacitor size of approximately:WUUCOUT≈2.5∆IOUTfO•VDROOPMore capacitance may be required depending on the dutycycle and load step requirements.In most applications, the input capacitor is merely re-quired to supply high frequency bypassing, since theimpedance to the supply is very low. A 10µF ceramiccapacitor is usually enough for these conditions.Setting the Output VoltageThe LTC3417 develops a 0.8V reference voltage betweenthe feedback pins, VFB1 and VFB2, and the signal ground asshown in Figure 4. The output voltages are set by tworesistive dividers according to the following formulas:⎛R1⎞VOUT1≈0.8V⎜1+⎟⎝R2⎠⎛R3⎞VOUT2≈0.8V⎜1+⎟⎝R4⎠Keeping the current small (<5µA) in these resistors maxi-mizes efficiency, but making the current too small mayallow stray capacitance to cause noise problems andreduce the phase margin of the error amp loop.To improve the frequency response, a feed-forward ca-pacitor, CF, may also be used. Great care should be takento route the VFB node away from noise sources, such as theinductor or the SW line.3417fb

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LTC3417

APPLICATIOS IFORATIOVRUN2V/DIVVOUT1V/DIVIL1A/DIVVIN = 3.6VVOUT = 1.8VRL = 0.9Ω200µs/DIVFigure 2. Digital Soft-Start Out1Soft-StartSoft-start reduces surge currents from VIN by graduallyincreasing the peak inductor current. Power supply se-quencing can also be accomplished by controlling the ITHpin. The LTC3417 has an internal digital soft-start for eachregulator output, which steps up a clamp on ITH over 1024clock cycles, as can be seen in Figures 2 and 3. As thevoltage on ITH ramps through its operating range, theinternal peak current limit is also ramped at a proportionallinear rate.Mode SelectionThe MODE pin provides mode selection. Connecting thispin to VIN enables Burst Mode operation for both regula-tors, which provides the best low current efficiency at thecost of a higher output voltage ripple. When MODE isconnected to ground, pulse skipping operation is selectedfor both regulators, which provides the lowest outputvoltage and current ripple at the cost of low currentefficiency. Applying a voltage that is more than 1V fromeither supply results in forced continuous mode for bothregulators, which creates a fixed output ripple and allowsthe sinking of some current (about 1/2∆IL). Since theswitching noise is constant in this mode, it is also theeasiest to filter out. In many cases, the output voltage canbe simply connected to the MODE pin, selecting the forcedcontinuous mode except at start-up.Checking Transient ResponseThe ITH pin compensation allows the transient response tobe optimized for a wide range of loads and output capaci-Utors. The availability of the ITH pin not only allows optimi-zation of the control loop behavior, but also provides a DCcoupled and AC filtered closed-loop response test point.The DC step, rise time, and settling at this test point trulyreflects the closed-loop response. Assuming a predomi-nantly second order system, phase margin and/or damp-ing factor can be estimated using the percentage ofovershoot seen at this pin. The bandwidth can also beestimated using the percentage of overshoot seen at thispin or by examining the rise time at this pin.The ITH external components shown in the Figure 4 circuitwill provide an adequate starting point for most applica-tions. The series RC filter sets the dominant pole-zero loopcompensation. The values can be modified slightly (from0.5 to 2 times their suggested values) to optimize transientresponse once the final PC layout is done and the particu-lar output capacitor type and value have been determined.The output capacitors need to be selected because ofvarious types and values determine the loop feedbackfactor gain and phase. An output current pulse of 20% to100% of full load current having a rise time of 1µs to 10µswill produce output voltage and ITH pin waveforms that willgive a sense of overall loop stability without breaking thefeedback loop.Switching regulators take several cycles to respond to astep in load current. When a load step occurs, VOUTimmediately shifts by an amount equal to ∆ILOAD • ESRCOUT,where ESRCOUT is the effective series resistance of COUT.∆ILOAD also begins to charge or discharge COUT generat-ing a feedback error signal used by the regulator to returnVOUT to its steady-state value. During this recovery time,VRUN2V/DIVVOUT1V/DIVIL

0.5A/DIV

VIN = 3.6VVOUT = 2.5VRL = 2Ω

200µs/DIV

WUUFigure 3. Digital Soft-Start Out23417fb

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LTC3417

APPLICATIOS IFORATIOVOUT can be monitored for overshoot or ringing that wouldindicate a stability problem.The initial output voltage step may not be within thebandwidth of the feedback loop, so the standard secondorder overshoot/DC ratio cannot be used to determinephase margin. The gain of the loop increases with RITH andthe bandwidth of the loop increases with decreasing CITH.If RITH is increased by the same factor that CITH is de-creased, the zero frequency will be kept the same, therebykeeping the phase the same in the most critical frequencyrange of the feedback loop. In addition, feedforward ca-pacitors, C1 and C2, can be added to improve the highfrequency response, as shown in Figure 4. Capacitor C1provides phase lead by creating a high frequency zero withR1 which improves the phase margin for the 1.4A SW1channel. Capacitor C2 provides phase lead by creating ahigh frequency zero with R3 which improves the phasemargin for the 800mA SW2 channel.The output voltage settling behavior is related to thestability of the closed-loop system and will demonstratethe actual overall supply performance. For a detailedexplanation of optimizing the compensation components,including a review of control loop theory, refer to LinearTechnology Application Note 76.Although a buck regulator is capable of providing the fulloutput current in dropout, it should be noted that as theinput voltage VIN drops toward VOUT, the load step capa-bility does decrease due to the decreasing voltage acrossthe inductor. Applications that require large load stepcapability near dropout should use a different topologysuch as SEPIC, Zeta, or single inductor, positive buckboost.In some applications, a more severe transient can becaused by switching in loads with large (>1µF) inputcapacitors. The discharged input capacitors are effectivelyput in parallel with COUT, causing a rapid drop in VOUT. Noregulator can deliver enough current to prevent this prob-14

Ulem, if the switch connecting the load has low resistanceand is driven quickly. The solution is to limit the turn-onspeed of the load switch driver. A Hot SwapTM controller isdesigned specifically for this purpose and usually incorpo-rates current limiting, short-circuit protection, and soft-starting.Efficiency ConsiderationsThe percent efficiency of a switching regulator is equal tothe output power divided by the input power times 100. Itis often useful to analyze individual losses to determinewhat is limiting the efficiency and which change wouldproduce the most improvement. Percent efficiency can beexpressed as:% Efficiency = 100% – (P1+ P2 + P3 +…)where P1, P2, etc. are the individual losses as a percentageof input power.Although all dissipative elements in the circuit producelosses, four main sources account for most of the lossesin LTC3417 circuits: 1) LTC3417 IS current, 2) switchinglosses, 3) I2R losses, 4) other losses.1) The IS current is the DC supply current given in theelectrical characteristics which excludes MOSFET driverand control currents. IS current results in a small (<0.1%)loss that increases with VIN, even at no load.2) The switching current is the sum of the MOSFET driverand control currents. The MOSFET driver current resultsfrom switching the gate capacitance of the power MOSFETs.Each time a MOSFET gate is switched from low to high tolow again, a packet of charge moves from VIN to ground.The resulting charge over the switching period is a currentout of VIN that is typically much larger than the DC biascurrent. The gate charge losses are proportional to VIN andthus their effects will be more pronounced at highersupply voltages.Hot Swap is a trademark of Linear Technology Corporation.3417fb

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LTC3417

APPLICATIOS IFORATIO3) I2R losses are calculated from the DC resistances of theinternal switches, RSW, and the external inductor, RL. Incontinuous mode, the average output current flowingthrough inductor L is “chopped” between the internal topand bottom switches. Thus, the series resistance lookinginto the SW pin is a function of both top and bottomMOSFET RDS(ON) and the duty cycle (DC) as follows:RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)The RDS(ON) for both the top and bottom MOSFETs can beobtained from the Typical Performance Characteristicscurves. Thus, to obtain I2R losses:I2R losses = IOUT2(RSW + RL)where RL is the resistance of the inductor.4) Other “hidden” losses such as copper trace and internalbattery resistances can account for additional efficiencydegradations in portable systems. It is very important toinclude these “system” level losses in the design of asystem. The internal battery and fuse resistance lossescan be minimized by making sure that CIN has adequatecharge storage and very low ESRCOUT at the switchingfrequency. Other losses including diode conduction lossesduring dead-time and inductor core losses generally ac-count for less than 2% total additional loss.Thermal ConsiderationsThe LTC3417 requires the package Exposed Pad (PGND2/GNDD pin) to be well soldered to the PC board. This givesthe DFN and TSSOP packages exceptional thermal prop-erties, compared to similar packages of this size, makingit difficult in normal operation to exceed the maximumjunction temperature of the part. In a majority of applica-tions, the LTC3417 does not dissipate much heat due to itshigh efficiency. However, in applications where theLTC3417 is running at high ambient temperature with lowsupply voltage and high duty cycles, such as in dropout,the heat dissipated may exceed the maximum junctiontemperature of the part. If the junction temperature reachesapproximately 150°C, both switches in both regulatorswill be turned off and the SW nodes will become highimpedance.UTo prevent the LTC3417 from exceeding its maximumjunction temperature, the user will need to do somethermal analysis. The goal of the thermal analysis is todetermine whether the power dissipated exceeds themaximum junction temperature of the part. The tempera-ture rise is given by:TRISE = PD • θJAwhere PD is the power dissipated by the regulator and θJAis the thermal resistance from the junction of the die to theambient temperature.The junction temperature, TJ, is given by:TJ = TRISE + TAMBIENTAs an example, consider the case when the LTC3417 is indropout in both regulators at an input voltage of 3.3V withload currents of 1.4A and 800mA. From the TypicalPerformance Characteristics graph of Switch Resistance,the RDS(ON) resistance of the 1.4A P-channel switch is0.09Ω and the RDS(ON) of the 800mA P-channel switch is0.163Ω. The power dissipated by the part is:PD = I12 • RDS(ON)1 + I22 • RDS(ON)2PD = 1.42 • 0.09 + 0.82 • 0.163PD = 281mWThe DFN package junction-to-ambient thermal resistance,θJA, is about 43°C/W. Therefore, the junction temperatureof the regulator operating in a 70°C ambient temperatureis approximately:TJ = 0.281 • 43 + 70TJ = 82.1°CRemembering that the above junction temperature isobtained from an RDS(ON) at 25°C, we might recalculatethe junction temperature based on a higher RDS(ON) sinceit increases with temperature. However, we can safelyassume that the actual junction temperature will notexceed the absolute maximum junction temperature of125°C.3417fb

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LTC3417

APPLICATIOS IFORATIODesign ExampleAs a design example, consider using the LTC3417 in aportable application with a Li-Ion battery. The batteryprovides a VIN from 2.5V to 4.2V. One output requires 1.8Vat 1.3A in active mode, and 1mA in standby mode. Theother output requires 2.5V at 700mA in active mode, and500µA in standby mode. Since both loads still need powerin standby, Burst Mode operation is selected for good lowload efficiency (MODE = VIN).First, determine what frequency should be used. Higherfrequency results in a lower inductor value for a given ∆IL(∆IL is estimated as 0.35ILOAD(MAX)). Reasonable valuesfor wire wound surface mount inductors are usually in therange of 1µH to 10µH.CONVERTER OUTPUTSW1SW2ILOAD(MAX)1.4A800mA∆IL490mA280mAUsing the 1.5MHz frequency setting (FREQ = VIN), we getthe following equations for L1 and L2:L1=1.8V⎛1.8V⎞1–=1.4µH⎠⎝4.2V⎟1.5MHz•490mA⎜Use1.5µH.L2=2.5V⎛2.5V⎞1–=2.4µH⎟⎜⎠⎝1.5MHz•280mA4.2VUse2.2µH.16

UCOUT selection is based on load step droop instead of ESRrequirements. For a 5% output droop:WUUCOUT1=2.5•COUT2=2.5•1.3A=24µF1.5MHz(5%•1.8V)0.7A=9.3µF1.5MHz(5%•2.5V)The closest standard values are 22µF and 10µF.The output voltages can now be programmed by choosingthe values of R1, R2, R3, and R4. To maintain highefficiency, the current in these resistors should be keptsmall. Choosing 2µA with the 0.8V feedback voltagesmakes R2 and R4 equal to 400k. A close standard 1%resistor is 412k. This then makes R1 = 515k. A closestandard 1% is 511k. Similarily, with R4 at 412k, R3 isequal to 875k. A close 1% resistor is 866k.The compensation should be optimized for these compo-nents by examining the load step response, but a goodplace to start for the LTC3417 is with a 5.9kΩ and 2200pFfilter on ITH1 and 2.87k and 6800pF on ITH2. The outputcapacitor may need to be increased depending on theactual undershoot during a load step.The PGOOD pin is a common drain output and requires apull-up resistor. A 100k resistor is used for adequatespeed. Figure 4 shows a complete schematic for thisdesign.3417fb

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LTC3417

APPLICATIOS IFORATIOVIN2.25V TO 5.5VCIN10µFVOUT11.8V1.4AL11.5µHC1 22pFVINR1 511kCOUT122µFR2412kR55.9kC32200pFVFB1L1: MIDCOM DUS-5121-1R5RCOUT1: KEMET C1210C226K8PACOUT1 Efficiency vs Load Current100VIN = 3.6VVOUT = 1.8V95FREQ = 1MHzREFER TO FIGURE 490858075700.0010.001103417 F04aEFFICIENCY (%)Figure 4. 1.8V at 1.4A/2.5V at 800mA Step-Down RegulatorsUCIN10.1µFCIN20.1µFR7100kVIN1VIN2MODESW1RUN1LTC3417VFB2FREQVINR62.87kC46800pF3417 F04WUUPGOODSW2RUN2VINL22.2µHC2 22pFVOUT22.5V800mAR3 866kR4412kCOUT210µFPHASEITH1ITH2EXPOSEDGNDAPADGNDDL2: MIDCOM DUS-5121-2R2RCOUT2, CIN: KEMET C1206C106K4PAC101POWER LOSS (W)EFFICIENCY0.1POWER LOSS0.010.010.11LOAD CURRENT (A)3417fb

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LTC3417

APPLICATIOS IFORATIOBoard Layout ConsiderationsWhen laying out the printed circuit board, the followingchecklist should be used to ensure proper operation of theLTC3417. These items are also illustrated graphically inthe layout diagram of Figure 5. Check the following in yourlayout.1.Does the capacitor CIN connect to the power VIN1(Pin2), VIN2 (Pin 8), and PGND2/GNDD (Pin 17) asclose as possible (DFN package)? It may be necessaryto split CIN into two capacitors. This capacitor providesthe AC current to the internal power MOSFETs andtheir drivers.2. Are the COUT1, L1 and COUT2, L2 closely connected? The(–) plate of COUT1 returns current to PGND1, and the(–) plate of COUT2 returns current to the PGND2/GNDDand the (–) plate of CIN.3.The resistor divider, R1 and R2, must be connectedbetween the (+) plate of COUT1 and a ground lineterminated near GNDA. The resistor divider, R3 and R4,VINCIN10µFCIN20.1µFVIN2PGND2/EXPOSED PADGNDAL2VOUT2CC2R3R4STAR TOGNDA

CITH2RITH2R8ITH2PGOODRUN2PHASEGNDDSW2COUT2VIN18

Umust be connected between the (+) plate of COUT2 anda ground line terminated near GNDA. The feedbacksignals VFB1 and VFB2 should be routed away from noisecomponents and traces, such as the SW lines, and itstrace should be minimized.4.Keep sensitive components away from the SW pins.The input capacitor CIN, the compensation capacitorsCC1, CC2, CITH1 and CITH2 and all resistors R1, R2, R3,R4, RITH1 and RITH2 should be routed away from the SWtraces and the inductors L1 and L2.5.A ground plane is preferred, but if not available, keep thesignal and power grounds segregated with small signalcomponents returning to the GNDA pin at one pointwhich is then connected to the PGND2/GNDD pin.6.Flood all unused areas on all layers with copper. Flood-ing with copper will reduce the temperature rise ofpower components. These copper areas should beconnected to one of the input supplies.VIN1PGND1COUT1L1SW1CC1R1R2ITH1FREQRUN1MODERITH1R7CITH1STAR TOGNDAVOUT1CIN10.1µFVFB2LTC3417VFB1VINWUUFigure 53417fb

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LTC3417

PACKAGE DESCRIPTIO3.50 ±0.051.65 ±0.052.20 ±0.05(2 SIDES)0.25 ± 0.050.50 BSC4.40 ±0.05(2 SIDES)RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS6.60 ±0.104.50 ±0.10SEE NOTE 4RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50*(.169 – .177)0.09 – 0.20(.0035 – .0079)NOTE:1. CONTROLLING DIMENSION: MILLIMETERSMILLIMETERS2. DIMENSIONS ARE IN(INCHES)3. DRAWING NOT TO SCALEInformation furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.UDHC Package16-Lead Plastic DFN (5mm × 3mm)(Reference LTC DWG # 05-08-1706)R = 0.115TYPR = 0.20TYP9165.00 ±0.10(2 SIDES)0.65 ±0.050.40 ± 0.10PACKAGEOUTLINEPIN 1TOP MARK(SEE NOTE 6)0.200 REF0.75 ±0.054.40 ±0.10(2 SIDES)BOTTOM VIEW—EXPOSED PADNOTE:1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDECPACKAGE OUTLINE MO-2292. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE5. EXPOSED PAD SHALL BE SOLDER PLATED6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE3.00 ±0.10(2 SIDES)1.65 ± 0.10(2 SIDES)PIN 1NOTCH (DHC16) DFN 1103810.25 ± 0.050.50 BSC0.00 – 0.05FE Package20-Lead Plastic TSSOP (4.4mm)(Reference LTC DWG # 05-08-1663)Exposed Pad Variation CA4.95(.195) 6.40 – 6.60*(.252 – .260)4.95(.195)201918171615141312112.74(.108)0.45 ±0.051.05 ±0.100.65 BSC123456789106.402.74(.252)(.108)BSC0.25REF1.20(.047)MAX0° – 8°0.50 – 0.75(.020 – .030)0.65(.0256)BSC0.195 – 0.30(.0077 – .0118)TYP0.05 – 0.15(.002 – .006)FE20 (CA) TSSOP 02044. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006\") PER SIDE3417fb

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LTC3417

RELATED PARTSPART NUMBERLTC3404LTC3405/LTC3405ALTC3406/LTC3406BLTC3407LTC3407-2LTC3409LTC3411LTC3412LTC3413LTC3414LTC3416LTC3418LTC3440LTC3441LTC3443LTC3448LTC3548DESCRIPTION600mA (IOUT), 1.4MHz, Synchronous Step-Down DC/DCConverter300mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DCConverters600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DCConvertersCOMMENTS95% Efficiency, VIN: 2.7V to 6V, VOUT(MIN) = 0.8V, IQ = 10µA,ISD < 1µA, MS8 Package95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 20µA,ISD < 1µA, ThinSOTTM Package96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20µA,ISD < 1µA, ThinSOT PackageDual 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40µA,ConverterISD < 1µA, MSE/DFN PackagesDual 800mA (IOUT), 2.25MHz, Synchronous Step-DownDC/DC Converter600mA, Low VIN (1.6V to 5.5V), Synchronous Step-DownDC/DC Converter1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DCConverter95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40µA,ISD < 1µA, MSE/DFN Packages95% Efficiency, VIN: 1.6V to 5.5V, VOUT(MIN) = 0.6V, IQ = 65µA,ISD < 1µA, DFN Packages95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60µA,ISD < 1µA, MS Package2.5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60µA,ISD < 1µA, TSSOP16E Package3A (IOUT Sink/Source), 2MHz, Monolithic SynchronousRegulator for DDR/QDR Memory Termination4A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter4A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converterwith Tracking8A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter600mA (IOUT), 2MHz, Synchronous Buck-Boost DC/DCConverter600mA (IOUT), 2MHz, Synchronous Buck-Boost DC/DCConverter1.2A (IOUT), 600kHz, Synchronous Buck-Boost DC/DCConverter1.5MHz/2.25MHz, 600mA Synchronous Step-Down DC/DCConverter with LDO ModeDual 800mA and 400mA (IOUT), 2.25MHz, SynchronousStep-Down DC/DC Converter90% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = VREF/2, IQ = 280µA,ISD < 1µA, TSSOP16E Package95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 64µA,ISD < 1µA, TSSOP20E Package95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 64µA,ISD < 1µA, TSSOP20E Package95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 380µA,ISD < 1µA, QFN Package95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.4V, IQ = 25µA,ISD < 1µA, MS/DFN Packages95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.4V, IQ = 25µA,ISD < 1µA, DFN Package95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN) = 2.4V, IQ = 28µA,ISD < 1µA, MS Package96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 32µA,ISD < 1µA, DFN/MS8E95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40µA,ISD < 1µA, MSE/DFN Packages ThinSOT is a trademark of Linear Technology Corporation.3417fb

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Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.comLT 0506 REV B • PRINTED IN USA

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