专利名称：Process for manufacturing an integrated
circuit including a dual-damascene structureand an integrated circuit
发明人：Sailesh Chittipeddi,Sailesh Mansinh Merchant申请号：US09385165申请日：19990830公开号：US06313025B1公开日：20011106
专利附图：
摘要：A process for forming a dual damascene structure. The process includesforming a stack including insulating layers and a stop layer where two masks are formed
above the stack. One of the masks is used to form via or contact openings in the
insulating layers and the second mask is used to form grooves for interconnections in theinsulating layers. In an alternative embodiment, the grooves are formed before the via orcontact openings.
申请人：AGERE SYSTEMS GUARDIAN CORP.
代理人：Anthony Grillo
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