Method of forming a CMOS device with stressor sour

专利名称：Method of forming a CMOS device with

stressor source/drain regions

发明人：Da Zhang,Bich-Yen Nguyen申请号：US11349595申请日：20060208公开号：US07446026B2公开日：20081104

专利附图：

摘要：A method for forming a semiconductor device includes providing asemiconductor substrate having a first doped region and a second doped region,providing a dielectric over the first doped region and the second doped region, and

forming a first gate stack over the dielectric over at least a portion of the first dopedregion. The first gate stack includes a metal portion over the dielectric, a first in situdoped semiconductor portion over the metal portion, and a first blocking cap over the insitu doped semiconductor portion. The method further includes performing

implantations to form source/drain regions adjacent the first and second gate stack,where the first blocking cap has a thickness sufficient to substantially block implantdopants from entering the first in situ doped semiconductor portion. Source/drainembedded stressors are also formed.

申请人：Da Zhang,Bich-Yen Nguyen

地址：Austin TX US,Austin TX US

国籍：US,US

代理人：Robert L. King,Joanna G. Chiu

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