Adaptive cache miss prediction mechanism

专利名称：Adaptive cache miss prediction mechanism发明人：Ryan, Charles P.申请号：EP931027.0申请日：19930219公开号：EP0560100B1公开日：19990609

摘要：In a data processing system which employs a cache memory feature, a methodand exemplary special purpose apparatus for practicing the method are disclosed tolower the cache miss ratio for called operands. Recent cache misses are stored in a firstin, first out miss stack, and the stored addresses are searched for displacement patternsthereamong. Any detected pattern is then employed to predict a succeeding cache missby prefetching from main memory the signal identified by the predictive address. Theapparatus for performing this task is preferably hard wired for speed purposes andincludes subtraction circuits for evaluating variously displaced addresses in the miss stackand comparator circuits for determining if the outputs from at least two subtractioncircuits are the same indicating a pattern yielding information which can be combined wishan address in the stack to develop a predictive address. The cache miss predictionmechanism is adaptively selectively enabled by an adaptive circuit that develops a shortterm operand cache hit ratio history and responds to ratio improving and ratiodeteriorating trends by accordingly enabling and disabling the cache miss predictionmechanism.

申请人：BULL HN INFORMATION SYST

地址：US

国籍：US

代理机构：Altenburg, Udo, Dipl.-Phys.

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