专利名称：Methods and Apparatuses for Performing
Multiplication
发明人：Kuo-Tseng Tseng Tseng,Parkson Wong申请号：US15424929申请日：20170206
公开号：US20170168775A1公开日：20170615
专利附图：
摘要：In a novel computation device, a plurality of partial product generators iscommunicatively coupled to a binary number multiplier. The binary number is partitionedin the computation device into non-overlapping subsets of binary bits and each subset is
coupled to one of the plurality of partial product generators. Each partial productgenerator, upon receiving, a subset of binary bits representing a number, generates amultiplication product of the number and a predetermined constant. The multiplicationproducts from all partial product generators are summed to generate the final, productbetween the predetermined constant and the binary number. The partial productgenerators are constructed by logic gates and wires connected the logic gates includinga AND gate. The partial product generators are free of memory elements.
申请人：Kuo-Tseng Tseng,Parkson Wong
地址：US,US
国籍：US,US
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