WAFER LEVEL CHIP SCALE SEMICONDUCTOR PACKAGE

专利名称：WAFER LEVEL CHIP SCALE SEMICONDUCTOR

PACKAGE

发明人：ROELF GROENHUIS,LEO VAN

GEMERT,TONNY KAMPHUIS,JAN GULPEN

申请号：US15431124申请日：20170213

公开号：US20170372988A1公开日：20171228

专利附图：

摘要：This disclosure relates to a method of forming a wafer level chip scalesemiconductor package, the method comprising: providing a carrier having a cavityformed therein; forming electrical contacts at a base portion and sidewalls portions ofthe cavity; placing a semiconductor die in the base of the cavity; connecting bond pads ofthe semiconductor die to the electrical contacts; encapsulating the semiconductor die;and removing the carrier to expose the electrical contacts, such that the electricalcontacts are arranged directly on the encapsulation material.

申请人：NXP B.V.

地址：EINDHOVEN NL

国籍：NL

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