专利名称:Video recorder发明人:Hirashima,Masayoshi申请号:EP93106242.6申请日:19930416公开号:EP0571753B1公开日:19990331
摘要:A scramble codec comprises a nonvolatile key data memory which holds a keydata varying from one video recorder to another, a pair of line memories in which inputpicture signals are alternately written for each horizontal scan line, a nonlinear feedbackshift register which is initialized with the output of the key data memory to outputdissimilar pseudorandom pulse signals for respective horizontal scan lines, an addresssetting circuit which sets, as the initial value for scrambling, a value corresponding to theoutput of the nonlinear feedback shift register and, as the initial value for descrambling, avalue obtained by subtracting the output or the nonlinear feedback shift register fromthe maximum address value of each line memory and an address counter which generatesa consecutive series of addresses beginning with the address set by the above addresssetting circuit and applies a signal for each horizontal scan line alternately to the pair ofline memories.
申请人:MATSUSHITA ELECTRIC IND CO LTD
地址:JP
国籍:JP
代理机构:Grünecker, Kinkeldey, Stockmair & Schwanhäusser Anwaltssozietät
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