7.1. HVDCP Insertion .........................................................................................
7.1.1. D+/D- Shorting Time .......Td+_d-_short＜20ms(Start of Vbus >= 0.8 V，End of D- >= 0.5 V) 7.1.2. D+/D- Remains Shorted at 3.3 V ....................................................... 7.2. HVDCP Negotiation ..............................................................................
7.2.1. One second Glitch Filter ............................................1.15s＜Tglitch_bc_done＜1.5s 7.2.2. Rdcp_dat ..............................................................Rdcp_dat Maximum Limit 40ohms 7.2.3. Rdm_dwn ......................................................14.25 k ohms＜Rdm_dwn＜ 24.80 k ohms 7.2.4. Rdat_lkg ........................................................300 k ohms＜Rdat_lkg＜ 1500 k ohms 7.3. PD Request Recognition ..........................................................................
7.3.1. Output Voltage ...................................................................................Sheet 1
7.3.2. Transition from 5 V to 12 V ................................................................Sheet 2/ Figure 1 7.3.3. Transition from 12 V to 9 V ...............................................................Sheet 3/ Figure 2 7.3.4. Maintain 9 V with 20 V Request ......................................................... 8.1V＜Vbus＜9.9V 7.3.5. Maintain 9 V with Continuous Request............................................... 8.1V＜Vbus＜9.9V 7.3.6. Transition from 12 V to 5 V ................................................................ Sheet 4/ Figure 3 7.4. PD Removal ..........................................................................................
7.4.1. Unplug Vbus Discharge Time ...............................................................Sheet 5 7.5. PD USB PHY Error Rejection ...................................................................
7.5.1. Square Wave Error Rejection .......................................... ................ 4.75V＜Vbus＜5.5V 7.5.2. D+/D- External Short Error Rejection ............................................... 4.75V＜Vbus＜5.5V 7.5.3. Recovery from D+/D- External Short ................................................ Sheet 6/ Figure 4 7.6. Continuous Mode PD Request Recognition .........................................
7.6.1. Upper bound of Tglitch_mode_change ..............................................Sheet 7
7.6.2. Tv_cont_change & Vbus_cont_step at Upper bound of D- Tglitch_cont_change ........... 7.6.3. Lower bound of D- Tglitch_cont_change ...........................................Sheet 9/ Figure 6 7.6.4. Lower bound of D- Tinactive .............................................................Sheet 10/ Figure 7 7.6.5. Tv_cont_change & Vbus_cont_step at Upper bound of D+ Tglitch_cont_change ........... 7.6.6. Lower bound of D+ Tglitch_cont_change ........................................... 7.6.7. Lower bound of D+ Tinactive ............................................................
7.6.8. Cumulative tolerance of Vbus_cont_step ..........................................Sheet 12/ Figure 9 7.7. Operating Characteristics ......................................................................
7.7.1. Vslew_max .......................................................................................Sheet 13/ Figure 10 7.7.2. Minimum Vbus_cont_range ..............................................................Sheet 14 7.8. Power Profile .........................................................................................
7.8.1. Load Point A & Minimum Pmax .........................................................Sheet 15 7.8.2. Load Point B ......................................................................................Sheet 16 7.8.3. Transition from Load Point A to Load Point B......................................Figure 11 7.8.4. Transition from Load Point B to Load Point A .....................................Figure 12
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TEST RESULTS Sheet 1 Output Voltage Sheet 2 Transition from 5 V to 12 V Figure 1 Transition from 5 V to 12 V Sheet 3 Transition from 12 V to 9 V NT6008-AN-0100 EOSMEM Corporation
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Figure 2 Tran sition from 12 V to 9 V Sheet 4 Transition from 12 V to 5 V Figure 3 Transition from 12 V to 5 V Sheet 5 Unplug Vbus Discharge Time Sheet 6 Recovery from D+/D- External Short NT6008-AN-0100 EOSMEM Corporation
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Figure 4 Recovery from D+/D- External Short Sheet 7 Upper bound of Tglitch_mode_change Sheet 8 Tv_cont_change & Vbus_cont_step at Upper bound of D- Tglitch_cont_change Figure 5 Tv_cont_change & Vbus_cont_step at Upper bound of D- Tglitch_cont_change Sheet 9 Lower bound of D- Tglitch_cont_change NT6008-AN-0100 EOSMEM Corporation
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Figure 6 Lower bound of D- Tglitch_cont_change Sheet 10 Lower bound of D- Tinactive Figure 7 Lower bound of D- Tinactive Sheet 11 Tv_cont_change & Vbus_cont_step at Upper bound of D+ Tglitch_cont_change NT6008-AN-0100 EOSMEM Corporation
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Figure 8 Tv_cont_change & Vbus_cont_step at Upper bound of D+ Tglitch_cont_change Sheet 12 Cumulative tolerance of Vbus_cont_step Figure 9 Cumulative tolerance of Vbus_cont_step Sheet 13 Vslew_max NT6008-AN-0100 EOSMEM Corporation
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Figure 10 Vslew_max Car charger & Adapter Sheet 14 Minimum Vbus_cont_range Power Bank NT6008-AN-0100 EOSMEM Corporation
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Sheet 15 Load Point A & Minimum Pmax Sheet 16 Load Point B Figure 11 Transition from Load Point A to Load Point B NT6008-AN-0100 EOSMEM Corporation
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Figure 12 Transition from Load Point B to Load Point A
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