Method and apparatus for accelerating execution of

专利名称：Method and apparatus for accelerating

execution of logical “and” instructions indata processing applications

发明人：Jack Kang,Jianwei Bei,Shanker Rao

Donthineni,Manish Kumar,Victor Lin,JustinLau

申请号：US12534633申请日：20090803公开号：US08468326B1公开日：20130618

专利附图：

摘要：A hardware module configured to perform single instructions faster than ispossible in software running on the microprocessor. In one implementation, the hardwaremodule is configured to perform a single count instruction, including - counting a numberof “ones” contained in a first register; and storing, in a second register, the count of thenumber of “ones” contained in the first register.

申请人：Jack Kang,Jianwei Bei,Shanker Rao Donthineni,Manish Kumar,Victor Lin,JustinLau

地址：Sunnyvale CA US,Rockville MD US,Germantown MD US,Clarksburg MDUS,Fremont CA US,Daly City CA US

国籍：US,US,US,US,US,US

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