Buffer circuits

专利名称：Buffer circuits发明人：Hiroaki, Ikeda申请号：EP83101022.8申请日：19830203公开号：EP0085436B1公开日：19890426

摘要：In a buffer circuit for producing to output signals (Ao,Ao) of the oppositephases in response to an input signal (A1) comprising a pre-circuit (1) producing two pre-output signals (A'o, A'o) in accordance with the input signal (A1) and a reference voltagesignal (VREF); and a main circuit (2) including a latch circuit (Q17, Q18) latching the pre-output signals (A'o, A'o), and a flip-flop circuit (Q11, Q12) connected to receive the pre-output signals (A'o, A'o) latched by the latch circuit (Qi7, Q18) for producing the outputsignals (Ao,Ao) of the buffer circuit, there is provided a transfer gate circuit (Q13, Q,4,Q15, Q16, C3, C4) enabled by the pre-output signals (A'o, A'o) and disabled by the outputsignals (Ao, Ao) of the buffer circuit. According to this invention, different from the priorart circuit, it is not necessary to use any clock signal having a high level at the time ofoperation of the buffer circuit and to have strict time spacing, whereby the clock signalgenerator can be simplified and the buffer circuit can be miniaturized and its operatinspeed can be increased (Figure 3).

申请人：NEC CORPORATION

代理机构：Kehl, Günther, Dipl.-Phys.

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