Circuit arrangement with a processor and at least

专利名称：Circuit arrangement with a processor and at

least two read-write memories

发明人：Karl-Heinz Honeck,David Johnson,Manfred

Neugebauer,Walter Teutsch,M. VittalKini,Steven C. Stacey

申请号：US07/125628申请日：19871125公开号：US04800532A公开日：19890124

摘要：In order for any failure of the power supply unit for two read- write memorieswhich are operable in parallel, not to result in irreversible damage to data, two parallelpower supply circuits are provided for the operation of the memories. Each power supplycircuit is capable of supplying the operating current of one of the memories and thestandby current of the remaining memory. Each of the power supply circuits in the powersupply is buffered with capacitors in such a manner that, upon a fault in one of the powersupply circuits, the output voltage, as soon as the capacitive buffer declines from anormal operating voltage to a threshold voltage and to a minimum operating voltage,data secure current reducing steps are taken. The capacitive circuits and thresholdvoltages are selected such that the period of time the voltage takes to decline from thethreshold to the minimum operating voltage is longer than the time required tocomplete the present read- write operation and to save the relevant data into thememory. One of the memories is then put into standby mode by a monitoring device asthe output voltage declines to the threshold voltage leaving only one active memory

which can be operated from one of the two memory power supply circuits.

申请人：SIEMENS AKTIENGESELLSCHAFT

代理人：Volker R. Ulbrich

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