专利名称：Integrated circuit, integrated circuit design
method and hardware descriptiongeneration method to generate hardwarebehavior description of integrated circuit
发明人：Masaki Ito申请号：US10770479申请日：20040204
公开号：US20040158803A1公开日：20040812
专利附图：
摘要：A functional block for verifying correct interface operation of any functional
block is generated from interface description and installed on a LSI chip. To accomplishthis, from the interface description, hardware description of a synthesizable interfacechecker is generated. Means for selecting interface functions to be checked is provided,thereby making it possible to reduce the overhead of circuits to be installed on the LSI.
申请人：HITACHI, LTD.
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